mixed-signal-feedback-control-snn-on-chip

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Mixed-signal hardware implementation of feedback-control optimizer for on-chip SNN training. Combines analog neuromorphic circuits with digital control loops for energy-efficient single-layer spiking neural network learning. Activation: on-chip learning, neuromorphic hardware, mixed-signal SNN, feedback control optimizer, hardware training.

hiyenwong By hiyenwong schedule Updated 6/3/2026

name: mixed-signal-feedback-control-snn-on-chip description: "Mixed-signal hardware implementation of feedback-control optimizer for on-chip SNN training. Combines analog neuromorphic circuits with digital control loops for energy-efficient single-layer spiking neural network learning. Activation: on-chip learning, neuromorphic hardware, mixed-signal SNN, feedback control optimizer, hardware training."

Mixed-Signal Feedback-Control Optimizer for SNN On-Chip Training

Proof-of-concept implementation of feedback-control optimizers on a mixed-signal neuromorphic processor, enabling expressive on-chip training of spiking neural networks with hardware-compatible learning rules.

Metadata

  • Source: arXiv:2603.24113
  • Authors: Jonathan Haag, Christian Metzner, Dmitrii Zendrikov et al.
  • Published: 2026-03-25
  • Category: cs.LG

Core Methodology

Key Innovation

Feedback-control optimizers reformulate SNN training as a control problem: instead of backpropagating errors through layers, a feedback controller adjusts synaptic weights to minimize a local objective. This paper demonstrates the first mixed-signal (analog+digital) hardware implementation of this paradigm.

Technical Framework

  1. Feedback-Control Optimization: Treats weight updates as control signals that drive the network toward a target loss. The optimizer maintains an internal model of the loss landscape and computes updates via control-theoretic principles (proportional-integral-derivative style corrections).

  2. Mixed-Signal Architecture:

    • Analog circuits implement the spiking neuron dynamics (leaky integrate-and-fire)
    • Digital circuits handle the optimizer state and weight update computation
    • The interface between analog and digital domains uses event-driven ADC/DAC
  3. In-The-Loop (ITL) Training: The hardware SNN is trained while operating within a measurement loop, where the optimizer reads neuron activity via on-chip sensors and computes weight updates in real time.

Key Results

  • Demonstrated on single-layer classification tasks
  • Achieved competitive accuracy vs. software-trained equivalents
  • Showed robustness to analog circuit non-idealities (mismatch, noise, drift)
  • Energy consumption significantly lower than digital-only training approaches

Implementation Guide

Prerequisites

  • Mixed-signal neuromorphic processor (e.g., custom ASIC or FPGA+analog front-end)
  • Understanding of control theory (PID controllers, state-space models)
  • SNN simulation framework for pre-silicon validation (e.g., Brian2, NEST)

Step-by-Step

  1. Define the SNN architecture (single LIF layer with readout)
  2. Formulate the training objective as a control problem
  3. Design the feedback controller (choose gains, sampling rate)
  4. Map controller to digital hardware (state machine or microcontroller)
  5. Calibrate analog neuron circuits (threshold, membrane time constant)
  6. Run ITL training with closed-loop weight updates
  7. Validate accuracy and energy consumption

Code Example

# Simplified feedback-control optimizer for SNN training
import numpy as np

class FeedbackControlOptimizer:
    """PID-style optimizer for SNN weight updates."""
    def __init__(self, n_inputs, n_outputs, lr=0.01, ki=0.001, kd=0.0):
        self.lr = lr  # Proportional gain
        self.ki = ki  # Integral gain
        self.kd = kd  # Derivative gain
        self.integral_error = np.zeros((n_outputs, n_inputs))
        self.prev_error = np.zeros((n_outputs, n_inputs))
    
    def step(self, weights, error, spike_rates):
        # Proportional term
        p_term = self.lr * error
        # Integral term (accumulated error)
        self.integral_error += error
        i_term = self.ki * self.integral_error
        # Derivative term (error change rate)
        d_term = self.kd * (error - self.prev_error)
        self.prev_error = error.copy()
        # Weight update
        weight_update = p_term + i_term + d_term
        weights += weight_update * spike_rates.T
        return weights

Applications

  • On-chip learning for edge neuromorphic devices
  • Adaptive sensory processing in robotics
  • Low-power online learning in implantable neural interfaces
  • Hardware-aware SNN training that co-optimizes for analog non-idealities

Pitfalls

  • Analog mismatch and device variation require per-chip calibration
  • Single-layer limitation restricts expressiveness; extension to multi-layer is non-trivial
  • ITL training loop latency must be shorter than network dynamics timescale
  • Noise in analog circuits can both help (regularization) and hurt (instability) training

Related Skills

  • snn-learning-neuromorphic
  • neuromorphic-continual-nuclear-ics
  • circuit-level-spiking-neuron-robustness
  • sharpness-aware-surrogate-snn-training
Install via CLI
npx skills add https://github.com/hiyenwong/ai_collection --skill mixed-signal-feedback-control-snn-on-chip
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