quantum-cayley-llm-adapters

name: quantum-cayley-llm-adapters category: quantum-ml description: Quantum-enhanced LLM methodology using Cayley-parameterized unitary adapters to overcome classical memory scaling limits. Enables quantum circuit blocks in frozen transformer architectures for LLM fine-tuning on real quantum hardware. trigger_words: quantum-enhanced llm, cayley adapter, unitary adapter, quantum fine-tuning, quantum language model, quantum adapter, parameterized quantum circuit version: 1.0.0 created: 2026-05-12 source: arXiv:2605.05914v1 authors: Borja Aizpurua, Sukhbinder Singh, Augustine Kshetrimayum, Saeed S. Jahromi, Roman Orus

Quantum-Enhanced LLMs via Cayley Unitary Adapters

Core Methodology

Cayley-parameterized unitary adapters are quantum circuit blocks inserted into frozen projection layers of pre-trained LLMs. This approach:

1. Parameter Efficiency: Only adapter parameters are trained while the base model remains frozen, dramatically reducing trainable parameter count
2. Quantum Advantage: Unitary transformations provide richer representational capacity than classical linear adapters
3. Hardware Compatibility: Designed to run on actual quantum hardware, not just simulators
4. Memory Scaling: Quantum parameterization overcomes the unfavorable classical memory scaling with model size

Implementation Steps

Step 1: Identify Frozen Layers

• Freeze all transformer projection layers (attention, FFN projections)
• These are the primary candidates for quantum adapter insertion

Step 2: Design Cayley Unitary Circuits

• Use Cayley transform to parameterize unitary matrices: U = (I - A)(I + A)⁻¹ where A is skew-Hermitian
• Map skew-Hermitian A to trainable quantum circuit parameters
• Ensure circuits are hardware-efficient (shallow depth, native gates)

Step 3: Adapter Integration

• Insert quantum circuit blocks as adapter layers between frozen projections
• Classical input → quantum encoding → variational circuit → measurement → classical output
• Maintain residual connections for training stability

Step 4: Training Protocol

• Train only quantum adapter parameters (not the base model)
• Use gradient-based optimization with parameter-shift rule or finite differences
• Batch processing: encode classical data into quantum states, measure, compute loss

Step 5: Deployment on Real Hardware

• Calibrate for specific quantum hardware noise profiles
• Use error mitigation techniques (zero-noise extrapolation, readout error mitigation)
• Validate that quantum advantage persists under realistic noise conditions

Key Advantages

• Scalability: Memory requirements scale favorably compared to classical fine-tuning
• Expressivity: Unitary transformations provide richer feature transformations
• Practical: Demonstrated on real quantum hardware, not just simulation
• Compatibility: Works with any pre-trained LLM architecture

Pitfalls

• Hardware Noise: NISQ devices have significant noise; error mitigation is essential
• Encoding Overhead: Classical-to-quantum data encoding can be a bottleneck
• Circuit Depth: Keep circuits shallow to minimize decoherence effects
• Gradient Estimation: Parameter-shift rule requires 2N circuit evaluations per parameter

Verification

• Compare performance against classical adapter baselines (LoRA, linear adapters)
• Verify that quantum advantage persists as problem size scales
• Test on multiple LLM architectures to confirm generality